Well maybe you can tell me why this wouldent work (config for hiresolution) I've tested it on 2D surfaces and it seems to do a good job with some minor tweaks.
technique Sharpen
{
pass Sharpen
{
vertexshader =
asm {
//
//
//
// Parameters:
//
// float2 ViewSize;
//
//
// Registers:
//
// Name Reg Size
// ------------ ----- ----
// ViewSize c0 1
//
preshader
rcp c0.x, c0.x
rcp c1.x, c0.y
// approximately 2 instructions used
//
//
vs_1_1
def c2, 0, 1, 0.5, -0.5
dcl_position v0
mov r0.x, -c0.x
mov r0.y, c1.x
add oPos.xy, r0, v0
mov oPos.zw, c2.xyxy
mad oT0.xy, v0, c2.zwzw, c2.z
// approximately 5 instruction slots used
};
pixelshader =
asm {
//
//
//
// Parameters:
//
// float2 PixelOffsets[9];
// float2 ViewSize;
//
//
// Registers:
//
// Name Reg Size
// ------------ ----- ----
// PixelOffsets c0 9
// ViewSize c9 1
//
preshader
rcp r0.x, c9.x
rcp r0.y, c9.y
mul c9.xy, r0.xy, c0.xy
mul c10.xy, r0.xy, c1.xy
mul c11.xy, r0.xy, c2.xy
mul c12.xy, r0.xy, c3.xy
mul c13.xy, r0.xy, c4.xy
mul c14.xy, r0.xy, c5.xy
mul c15.xy, r0.xy, c6.xy
mul c16.xy, r0.xy, c7.xy
mul c17.xy, r0.xy, c8.xy
// approximately 11 instructions used
//
//
//
// Parameters:
//
// float PixelWeights[9];
// sampler2D frameSamp;
//
//
// Registers:
//
// Name Reg Size
// ------------ ----- ----
// PixelWeights c0 9
// frameSamp s0 1
//
ps_2_0
def c18, 0.125, 0, 0, 0
dcl t0.xy
dcl_2d s0
add r8.xy, t0, c10
add r7.xy, t0, c9
add r6.xy, t0, c11
add r5.xy, t0, c12
add r4.xy, t0, c13
add r3.xy, t0, c14
add r2.xy, t0, c15
add r1.xy, t0, c16
add r0.xy, t0, c17
texld r8, r8, s0
texld r7, r7, s0
texld r6, r6, s0
texld r5, r5, s0
texld r4, r4, s0
texld r3, r3, s0
texld r2, r2, s0
texld r1, r1, s0
texld r0, r0, s0
mul r8, r8, c1.x
mad r7, r7, c0.x, r8
mad r6, r6, c2.x, r7
mad r5, r5, c3.x, r6
mad r4, r4, c4.x, r5
mad r3, r3, c5.x, r4
mad r2, r2, c6.x, r3
mad r1, r1, c7.x, r2
mad r0, r0, c8.x, r1
mul r0, r0, c18.x
mov oC0, r0
// approximately 29 instruction slots used (9 texture, 20 arithmetic)
};
}
}
Edit Damn I forgot to compile it with an original size as reference.